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IBM Chip Features Cross The 10 nm Barrier

SUNY College of Nanoscale Science and Engineering's Michael Liehr, left, and IBM's Bala Haranand look at wafer comprised of 7nm chips on Thursday, July 2, 2015, in a NFX clean room Albany. Several 7nm chips at SUNY Poly CNSE on Thursday in Albany. (Darryl Bautista/Feature Photo Service for IBM)

Michael Liehr (left) of SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering and Bala Haran (right) of IBM Research inspect a wafer comprised of 7 nm node test chips in a clean room in Albany, NY. IBM Research, working with alliance partners at SUNY Poly CNSE, has produced the semiconductor industry’s first 7 nm node test chips with functional transistors. (Courtesy: Darryl Bautista/Feature Photo Service for IBM) 

IBM Research has announced that it has succeeded in fabricating working test chips whose smallest features approach 7 nm. The breakthrough, achieved in collaboration with GlobalFoundries, Samsung and researchers at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering means that it may now be possible to pack more than 20 billion transistors onto a single chip. This is about twice as many as the current record.

Transistors were one of the most important inventions of the 20th century. In 1965, Gordon Moore, the co-founder of Intel, predicted that the number of transistors per square inch on integrated circuits would double every year, and this came to be known as Moore’s Law. The silicon industry succeeded in following this law until quite recently, with transistors exponentially decreasing in size over the decades.

Things are coming to a head, however (and not for want of trying), and it will be difficult to continue miniaturizing circuits based on top-down, lithographically fabricated bulk silicon transistors. Before IBM’s latest announcement, the smallest features on chips made to date measured 14 nm across.

Bypassing conventional semiconductor manufacturing processes

In a news release on its website, IBM and its partners describe how they bypassed conventional semiconductor manufacturing processes to achieve their result. For one, they employed silicon-germanium (SiGe), rather than just Si on its own, for the first time in their transistor channels (the parts of the device that conduct electricity). SiGe has a higher electron mobility than pure silicon, which means that it is better suited to smaller transistors. The transistors made by IBM are FinFETs – the semiconductor industry’s most complex type of transistor.

Second, the researchers managed to make use of very narrow wavelengths of ultraviolet light (also known as extreme ultraviolet light or EUV) to etch components. This new type of lithography can etch much finer molecular-scale lines than lithography that relies on longer wavelength light, although the etching rate is slower for EUV.

IBM also says that it used an “innovative” process to stack the transistors closer together on a chip. Indeed, the transistors boast a 30 nm pitch (the distance between the front edge of one transistor and the front edge of the next one).

Faster transistor switching speeds and lower operating powers

Although microprocessors utilising 22 nm and 14 nm-sized technology already power today’s servers, cloud data centres and mobile devices, many believe that 7 nm-sized architectures will be crucial for the continuing success of these technologies – all of which require high-storage-density memory modules built in from the start. These emerging applications will also demand faster transistor switching speeds and lower operating powers.

Mukesh Khare, vice president for semiconductor research at IBM, says that his company “has committed to spending $3 billion on chip research and development aimed at further extending today’s mainstream semiconductor technologies”. In a related blogpost, he adds that IBM is also looking into materials other than silicon as the primary material in semiconductors and the use of transistors for processing data.

Stephen Chou, head of the NanoStructure Laboratory at Princeton University, who was not involved in this work that IBM’s announcement of making 7 nm node chips is a “significant step” for the integrated circuit industry – in terms of both scaling and manufacturing. “Although my group fabricated the world’s smallest working individual Si MOSFETs (as small as 7 nm – in both length and width) in 1996 (nearly 20 years ago now), making MOSFETs with similar dimensions on the industrial scale is extremely challenging and requires many innovations and billions of dollars of investment. IBM’s success involves advancement of EUV lithography techniques and the use of SiGe.”

Source: Nanotechweb


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